RawSpeed Controller Performance Test v1.12 (c) November 1, 2017. Original
source code v1.10 July 1992 provided by Russel Miranda. Code additions and
optimized by SpeedGeek for SAS C 6.58 compiler. Documentation revisions and
code adjustments by Robert Miranda.
Permission obtained in October 2017 by Robert Miranda and SpeedGeek to
revise the RSCP source to the most recent v6.5x SAS C compiler, to clean
up / groom the code for more stable values under 68040/68060 CPUs, and to
add additional features.
RSCP is freely redistributable, but may not be modified in any way without
written permission from the author. It may be made part of any collection of
software, as long as no fee is charged other than a reasonable duplication
There are several benchmarks already. Why write another one? Well... other
benchmarks measure how fast your drive and controller are, but don't judge
how much of a performance hit your multitasking is taking while disk I/O is
being performed. This benchmark shows how much time is stolen from your
Amiga's other duties during controller transfers.
WHAT'S NEW in V1.12?
- The bar graph has been revised to display up to 4000K/sec.
- The Dhrystone benchmark memory allocations were adjusted to provide more
consistent values with 68040/68060 CPUs.
- The code was compiled with SAS C v6.58, and a 68020+ compiled version is
provided (just shy of 2K smaller code).
- The buffer selector now cycles in descending order, 512K-128K-16K
- An Enforcer hit (illegal read) in the About page was squashed.
This version is a cleanup / freshening of a tool that has found use in many
a performance tester's toolbox.
The Dhrystone benchmark is not comparable to values seen on other systems,
or other Dhrystone benchmarks. It is used here to measure the available
system CPU resources your system has available to perform processing tasks
while multitasking enabled. It is not intended to be a measure of clock
speed, or MIPS. Because multitasking is not disabled, the background tools
and enhancement features you prefer running on your system will have a small
impact even while 'idle'.
There is additional information on this version of RSCP v1.12 in the
in-program About screen.
THE FUTURE OF RSCP?
The original RSCP was designed when expansion peripherals were pushing the
limits of the 68000-based Amiga systems' bus. The 7Mhz, 16-bit data path of
the Zorro II bus meant a maximum of ~3.5MB/sec could pass over it, although
hardware developers had some tricks still up their sleeve. We are looking
to leave RSCP 1.xx as a useful tool for evaluating KS 1.3/68K machines'
performance. It can certainly be used on newer systems, too, and it's
results still have value.
SpeedGeek and I (Robert Miranda) are looking into additional features and
measurements that will be useful on the fully 32-bit, and faster main
data-bus, of the A1200/3000/4000 series systems. A number of optimizations
are known to be possible depending on the OS (2.0 or 3.1+), CPU (68020+),
memory design, 68040/68060 (if equipped) software library, and SCSI/IDE Disk
I/O options present in the system. If this research effort bears fruit, and
time allows, there may be something new again before another 25 years